M16CSLASH62 datasheet(572/615 Pages) RENESAS

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Appendix 1

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-255

Does not instruction DMA transfer occur between the instruction writing is enabled in the protect

Is writing enabled in the protect register before writing in the SI/Oi (i=3,4) control register (address

036216, 036616)?

Is writing effectuated in the SI/Oi (i=3,4) control register by the next instruction after writing is enabled

in the protect register?

Does not an interrupt generate between the instruction writing is enabled in the protect register and

the instruction writing in the SI/Oi (i=3,4) control register?

Does not instruction DMA transfer occur between the instruction writing is enabled in the protect

Checks regarding the timer

Is the timer started after a value is set in the timer register?

Checks regarding Interrupt

When rewrite the interrupt register, do so at a point that does not generate the interruput request?

Checks regarding low voltage and low power consumption

When using at low voltage, have you checked recommended operating conditions and changed the

wait bit (address 000516, bit 7) to “1”?

Does the oscillator to which the count source is going to be switched be oscillating stably, before the

count source for BCLK can be changed from XIN to XCIN or vice versa?

In the low power consumption mode, does not current flow from Vref when the Vref connection bit (bit

5 in address 03D716) is set?

Is not voltage level of port floating in the low power consumption mode?

Checks regarding A-D converter

Have you selected other than fAD (no dividing) for øAD when using the A-D converter at VCC = 2.7V

to 4.0V?

Have you selected no sample & hold function when using the A-D converter at VCC = 2.7V to 4.0V?

Have you selected 8-bit mode when using the A-D converter at VCC = 2.7V to 4.0V?

Does øAD use it by less than 10MHZ?

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