| 전자부품 데이터시트 검색엔진 |
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M16C/62M 데이터시트(PDF) 161 Page - Renesas Technology Corp |
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M16C/62M 데이터시트(HTML) 161 Page - Renesas Technology Corp |
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161 / 615 page ![]() Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER UART2 Special Mode Register 2 1-142 Bit 0 of the UART2 special mode register 2 (address 037616) is used as the I2C mode select bit 2. Table 1.16.11 shows the types of control to be changed by I2C mode select bit 2 when the I2C mode select bit is set to “1”. Table 1.16.12 shows the timing characteristics of detecting the start condition and the stop condition. Set the start/stop condition control bit (bit 7 of UART2 special mode register 2) to “1” in I2C mode. Function IICM2 = 1 IICM2 = 0 Factor of interrupt number 15 No acknowledgment detection (NACK) UART2 transmission (the rising edge of the final bit of the clock) Factor of interrupt number 16 Acknowledgment detection (ACK) UART2 reception (the falling edge of the final bit of the clock) DMA1 factor at the time when 1 1 0 1 is assigned to the DMA request factor selection bits Acknowledgment detection (ACK) UART2 reception (the falling edge of the final bit of the clock) Timing for transferring data from the UART2 reception shift register to the reception buffer. The rising edge of the final bit of the reception clock The falling edge of the final bit of the reception clock Timing for generating a UART2 reception/ACK interrupt request The rising edge of the final bit of the reception clock The falling edge of the final bit of the reception clock 1 2 3 4 5 3 to 6 cycles < duration for setting-up (Note 2) 3 to 6 cycles < duration for holding (Note 2) Note 1 : When the start/stop condition control bit SHTC is “1” . Note 2 : “Cycles” is in terms of the input oscillation frequency f(XIN) of the main clock. Duration for setting up Duration for holding SCL SDA (Start condition) SDA (Stop condition) Table 1.16.11. Functions changed by I2C mode select bit 2 Table 1.16.12. Timing characteristics of detecting the start condition and the stop condition (Note 1) |
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