M38043FDHKP datasheet(272/387 Pages) RENESAS

부품명	M38043FDHKP

상세설명	8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES

PDF	387 Pages

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제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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272 / 387 page

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APPLICATION

2.11

Clock generating circuit

Rev.1.00 Jan 14, 2005

REJ09B0212-0100Z

3804 Group (Spec.H)

Fig. 2.11.5 Control procedure

Control procedure: To prepare for a power failure, set the relevant registers in the order shown

below.

Initialization

CPUM (address 003B16), bit7, bit 6

CPUM (address 003B16), bit 4

0, 0

CPUM (address 003B16), bit7, bit 6

CPUM (address 003B16), bit5

1, 0 (Note)

1 (Note)

RESET

Internal system clock: f(XCIN)/2 (low-speed mode)

Main clock f(XIN) oscillation stopped

Note: Do not switch simultaneously.

Return processing from power failure

Set timer interrupt to occurs every second.

Execute WIT instruction.

At power failure, clock count is performed during

timer interrupt processing (every second).

Port XC: XCIN-XCOUT oscillation function

When selecting main clock f(XIN)/2 (high-speed mode)

Detect power failure ?

Return condition from power failure

completed ?

qX: This bit is not used here. Set it to “0” or “1” arbitrarily.

M38043FDHKP 데이터시트(PDF) 272 Page - Renesas Technology Corp