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M38043FDHKP 데이터시트(PDF) 278 Page - Renesas Technology Corp

부품명 M38043FDHKP
상세설명  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38043FDHKP 데이터시트(HTML) 278 Page - Renesas Technology Corp

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2-154
APPLICATION
2.12 Standby function
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
3804 Group (Spec.H)
(2)
Release of wait mode
The wait mode is released by reset input or by the occurrence of an interrupt request. Note the
differences in the restoration process according to reset input or interrupt request, as described
below.
In the wait mode, oscillation is continued, so an instruction can be executed immediately after the
wait mode is released.
sRestoration by reset input
The wait mode is released by holding the input level of the RESET pin at “L” in the wait mode.
Upon release of the wait mode, all ports are in the input state, and supply of the internal clock
φ to the CPU is started. To reset the microcomputer, the RESET pin should be held at an “L” level
for 16 cycles or more of XIN. The reset state is released in approximately 10.5 cycles to 18.5 cycles
of the XIN input after the input of the RESET pin is returned to the “H” level.
At release of wait mode, the internal RAM retains its contents previous to the reset. However, the
previous contents of the CPU register and SFR are not retained.
Figure 2.12.3 shows the reset input time.
For more details concerning reset, refer to “2.10 Reset”.
Fig. 2.12.3 Reset input time
Vcc
RESET
XIN
Wait mode
16 cycles of XIN
Operating mode
Time to hold internal reset state =
approximately 10.5 to 18.5 cycles of XIN input
Note: Some cases may occur in which no waveform is input to XIN (in low-speed mode).
(Note)
Execute WIT instruction



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