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M38043FDHKP 데이터시트(PDF) 300 Page - Renesas Technology Corp

부품명 M38043FDHKP
상세설명  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38043FDHKP 데이터시트(HTML) 300 Page - Renesas Technology Corp

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3-10
REJ09B0212-0100Z
Rev.1.00
Jan 14, 2005
3804 Group (Spec.H)
APPENDIX
3.1 Electrical characteristics
Note : When bit 6 of address 001A16 and bit 6 of address 003216 are “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 and bit 6 of address 003216 are “0” (UART).
Table 3.1.12 Timing requirements (2)
(VCC = 2.7 to 5.5 V, VSS = 0V, Ta = –20 to 85 °C, unless otherwise noted)
Limits
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Max.
Symbol
Unit
Typ.
Min.
250
320
500
120
150
240
120
150
240
70
90
100
32
40
50
500
650
1000
200
260
400
200
260
400
100
130
200
100
130
150
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
4.5
≤VCC≤5.5 V
4.0
≤VCC<4.5 V
2.7
≤VCC<4.0 V
Serial I/O1, serial I/O3
clock input cycle time (Note)
Serial I/O1, serial I/O3
clock input “H” pulse width (Note)
Serial I/O1, serial I/O3
clock input “L” pulse width (Note)
Serial I/O1, serial I/O3
clock input setup time
Serial I/O1, serial I/O3
clock input hold time
Serial I/O2
clock input cycle time
Serial I/O2
clock input “H” pulse width
Serial I/O2
clock input “L” pulse width
Serial I/O2
clock input setup time
Serial I/O2
clock input hold time
tC(SCLK1), tC(SCLK3)
tWH(SCLK1), tWH(SCLK3)
tWL(SCLK1), tWL(SCLK3)
tsu(RxD1-SCLK1),
tsu(RxD3-SCLK3)
th(SCLK1-RxD1),
th(SCLK3-RxD3)
tC(SCLK2)
tWH(SCLK2)
tWL(SCLK2)
tsu(SIN2-SCLK2)
th(SCLK2-SIN2)



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