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MPC8641D 데이터시트(PDF) 108 Page - Freescale Semiconductor, Inc |
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MPC8641D 데이터시트(HTML) 108 Page - Freescale Semiconductor, Inc |
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108 / 140 page ![]() MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 1 108 Freescale Semiconductor Signal Listings Note: 1. Multi-pin signals such as D1_MDQ[0:63] and D2_MDQ[0:63] have their physical package pin numbers listed in order corresponding to the signal names. 2. Stub Series Terminated Logic (SSTL-18 and SSTL-25) type pins. 3. If a DDR port is not used, it is possible to leave the related power supply (Dn_GVDD, Dn_MVREF) turned off at reset. Note that these power supplies can only be powered up again at reset for functionality to occur on the DDR port. 4. Low Voltage Differential Signaling (LVDS) type pins. 5. Low Voltage Transistor-Transistor Logic (LVTTL) type pins. 6. This pin is a reset configuration pin and appears again in the Reset Configuration Signals section of this table. See the Reset Configuration Signals section of this table for config name and connection details. 7. Recommend a weak pull-up resistor (1–10 k Ω) be placed from this pin to its power supply. 8. Recommend a weak pull-down resistor (2–10 k Ω) be placed from this pin to ground. 9. This multiplexed pin has input status in one mode and output in another 10. This pin is a multiplexed signal for different functional blocks and appears more than once in this table. 11. This pin is open drain signal. 12. Functional only on the MPC8641D. 13. These pins should be left floating. 14. These pins should be connected to SVDD. TSEC4_TXD[5]/ cfg_tsec4_reduce AB18 - LVDD TSEC4_TXD[6:7]/ cfg_tsec4_prtcl[0:1] AB17, AB16 - LVDD LAD[0:31]/ cfg_gpporcr[0:31] A30, E29, C29, D28, D29, H25, B29, A29, C28, L22, M22, A28, C27, H26, G26, B27, B26, A27, E27, G25, D26, E26, G24, F27, A26, A25, C25, H23, K22, D25, F25, H22 -OVDD LWE[0]/ cfg_cpu_boot E21 - OVDD LWE[1]/ cfg_rio_sys_size F21 - OVDD LWE[2:3]/ cfg_host_agt[0:1] D22, E20 - OVDD LDP[0:3], LA[27] / cfg_core_pll[0:4] A24, E24, C24, B24, J21 -OVDD 22 LA[28:31]/ cfg_sys_pll[0:3] K21, G22, F24, G21 - OVDD 22 LGPL[3], LGPL[5]/ cfg_boot_seq[0:1] K20, J19 -OVDD D1_MSRCID[0]/ cfg_mem_debug F15 - OVDD D1_MSRCID[1]/ cfg_ddr_debug K15 - OVDD Table 63. MPC8641 Signal Reference by Functional Block (continued) Name1 Package Pin Number Pin Type Power Supply Notes |
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