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ATmega324P 데이터시트(PDF) 278 Page - ATMEL Corporation |
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ATmega324P 데이터시트(HTML) 278 Page - ATMEL Corporation |
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278 / 377 page ![]() 278 7674F–AVR–09/09 ATmega164P/324P/644P 23.8 Register Description 23.8.1 MCUCR – MCU Control Register The MCU Control Register contains control bits for general MCU functions. • Bits 7 – JTD: JTAG Interface Disable When this bit is zero, the JTAG interface is enabled if the JTAGEN Fuse is programmed. If this bit is one, the JTAG interface is disabled. In order to avoid unintentional disabling or enabling of the JTAG interface, a timed sequence must be followed when changing this bit: The application software must write this bit to the desired value twice within four cycles to change its value. Note that this bit must not be altered when using the On-chip Debug system. 23.8.2 MCUSR – MCU Status Register The MCU Status Register provides information on which reset source caused an MCU reset. • Bit 4 – JTRF: JTAG Reset Flag This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic zero to the flag. Bit 7 65 43 21 0 0x35 (0x55) JTD BODS BODSE PUD – – IVSEL IVCE MCUCR Read/Write R/W R R R/W R R R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 765 432 10 0x34 (0x54) – – –JTRF WDRF BORF EXTRF PORF MCUSR Read/Write R R R R/W R/W R/W R/W R/W Initial Value 0 0 0 See Bit Description |
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