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ATtiny261-ESMZ 데이터시트(PDF) 149 Page - ATMEL Corporation

부품명 ATtiny261-ESMZ
상세설명  8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
PDF  227 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny261-ESMZ 데이터시트(HTML) 149 Page - ATMEL Corporation

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149
7753C–AVR–07/09
ATtiny261/ATtiny461/ATtiny861
Figure 19-6. ADC Timing Diagram, Auto Triggered Conversion
Figure 19-7. ADC Timing Diagram, Free Running Conversion
19.6
Changing Channel or Reference Selection
The MUX5:0 and REFS2:0 bits in the ADMUX Register are single buffered through a temporary
register to which the CPU has random access. This ensures that the channels and reference
selection only takes place at a safe point during the conversion. The channel and reference
selection is continuously updated until a conversion is started. Once the conversion starts, the
channel and reference selection is locked to ensure a sufficient sampling time for the ADC. Con-
tinuous updating resumes in the last ADC clock cycle before the conversion completes (ADIF in
ADCSRA is set).
Table 19-1.
ADC Conversion Time
Condition
Sample & Hold
(Cycles from Start of Conversion)
Total Conversion Time (Cycles)
First conversion
13.5
25
Normal conversions
1.5
13
Auto Triggered conversions
2
13.5
1
2
3
4
5
6
7
8
9
10
11
12
13
Sign and MSB of Result
LSB of Result
ADC Clock
Trigger
Source
ADIF
ADCH
ADCL
Cycle Number
12
One Conversion
Next Conversion
Conversion
Complete
Prescaler
Reset
ADATE
Prescaler
Reset
Sample &
Hold
MUX and REFS
Update
11
12
13
Sign and MSB of Result
LSB of Result
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
12
One Conversion
Next Conversion
34
Conversion
Complete
Sample & Hold
MUX and REFS
Update



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