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ATmega328P 데이터시트(PDF) 213 Page - ATMEL Corporation

부품명 ATmega328P
상세설명  8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash
PDF  448 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
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ATmega328P 데이터시트(HTML) 213 Page - ATMEL Corporation

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8161D–AVR–10/09
ATmega48PA/88PA/168PA/328P
• Bit 5:3 - Reserved Bits in MSPI mode
When in MSPI mode, these bits are reserved for future use. For compatibility with future devices,
these bits must be written to zero when UCSRnC is written.
• Bit 2 - UDORDn: Data Order
When set to one the LSB of the data word is transmitted first. When set to zero the MSB of the
data word is transmitted first. Refer to the Frame Formats section page 4 for details.
• Bit 1 - UCPHAn: Clock Phase
The UCPHAn bit setting determine if data is sampled on the leasing edge (first) or tailing (last)
edge of XCKn. Refer to the SPI Data Modes and Timing section page 4 for details.
• Bit 0 - UCPOLn: Clock Polarity
The UCPOLn bit sets the polarity of the XCKn clock. The combination of the UCPOLn and
UCPHAn bit settings determine the timing of the data transfer. Refer to the SPI Data Modes and
Timing section page 4 for details.
20.8.5
USART MSPIM Baud Rate Registers - UBRRnL and UBRRnH
The function and bit description of the baud rate registers in MSPI mode is identical to normal
USART operation. See “UBRRnL and UBRRnH – USART Baud Rate Registers” on page 199.



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