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LH79524 데이터시트(PDF) 54 Page - NXP Semiconductors |
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LH79524 데이터시트(HTML) 54 Page - NXP Semiconductors |
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54 / 64 page ![]() LH79524/LH79525 System-on-Chip 54 Rev. 01 — 16 July 2007 Preliminary data sheet NXP Semiconductors Reset, Clock, and Power Controller (RCPC) Waveforms Figure 37 shows the method the LH79524/LH79525 uses when coming out of Reset or Power On. Figure 38 shows external reset timing, and Table 18 gives the timing parameters. Table 18. Reset AC Timing PARAMETER DESCRIPTION MIN. TYP. MAX. UNIT tOSC32 Oscillator stabilization time after Power Up (VDDC = VDDCMIN) 550 ms tOSC14 Oscillator stabilization time after Power Up (VDDC = VDDCMIN) or exiting STOP2 2.5 ms tRSTIH nRESETIN hold time after crystal stabilization 200 µS tRSTIW nRESETIN Pulse Width (once sampled LOW) 2 HCLK tRSTOV nRESETIN LOW to nRESETOUT valid (once nRESETIN sampled LOW) 3.5 HCLK tRSTOH nRESETOUT hold relative to nRESETIN HIGH 1 HCLK Figure 37. PLL Start-up Figure 38. External Reset LH79525-22 tOSC14 tRSTOH VDDC XTAL14 XTAL32 nRESETIN tRSTIH tOSC32 nRESETOUT VDDCmin LH79525-23 tRSTIW tRSTOV nRESETIN nRESETOUT tRSTOH |
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