PIC18F23K20-ESLASHML datasheet(193/456 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS41303G-page 193

PIC18F2XK20/4XK20

17.0

MASTER SYNCHRONOUS

SERIAL PORT (MSSP)

MODULE

17.1

Master SSP (MSSP) Module

Overview

The Master Synchronous Serial Port (MSSP) module is

a serial interface, useful for communicating with other

peripheral or microcontroller devices. These peripheral

devices may be serial EEPROMs, shift registers, dis-

play drivers, A/D converters, etc. The MSSP module

can operate in one of two modes:

• Serial Peripheral Interface (SPI)

• Inter-Integrated Circuit (I2C)

- Full Master mode

- Slave mode (with general address call)

The I2C interface supports the following modes in

hardware:

•Master mode

• Multi-Master mode

• Slave mode

17.2

Control Registers

The MSSP module has seven associated registers.

These include:

• SSPSTA – STATUS register

• SSPCON1 – First Control register

• SSPCON2 – Second Control register

• SSPBUF – Transmit/Receive buffer

• SSPSR – Shift register (not directly accessible)

• SSPADD – Address register

• SSPMSK – Address Mask register

The use of these registers and their individual Configu-

ration bits differ significantly depending on whether the

MSSP module is operated in SPI or I2C mode.

Additional details are provided under the individual

sections.

17.3

SPI Mode

The SPI mode allows 8 bits of data to be synchronously

transmitted and received simultaneously. All four

modes

SPI

are

supported.

accomplish

communication, typically three pins are used:

• Serial Data Out – SDO

• Serial Data In – SDI/SDA

• Serial Clock – SCK/SCL

Additionally, a fourth pin may be used when in a Slave

mode of operation:

• Slave Select – SS

Figure 17-1 shows the block diagram of the MSSP

module when operating in SPI mode.

FIGURE 17-1:

MSSP BLOCK DIAGRAM

(SPI MODE)

(

)

Read

Write

Internal

Data Bus

SSPSR Reg

SSPM<3:0>

bit 0

Shift

Clock

SS Control

Enable

Edge

Select

Clock Select

TMR2 Output

TOSC

Prescaler

4, 16, 64

Edge

Select

Data to TX/RX in SSPSR

TRIS bit

SMP:CKE

SDO

SSPBUF Reg

SDI/SDA

SCK/SCL

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