MAC7200 datasheet(131/976 Pages) FREESCALE

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Detailed Signal Descriptions

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

4.3.68

PG[9] — PORT G I/O Pin

PG[9] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It can be configured to wake the system out of low-power mode (DOZE) when an external signal is

applied using the interrupt functionality.

4.3.69

PG[10] — PORT G I/O Pin

PG[10] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It can be configured to wake the system out of low-power mode (DOZE) when an external signal is

applied using the interrupt functionality.

4.3.70

PG[11] — PORT G I/O Pin

PG[8] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It can be configured to wake the system out of low-power mode (DOZE) when an external signal is

applied using the interrupt functionality.

4.3.71

PG[12] / PCS[4] — Port G I/O Pin and DSPI_A

PG[12] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide

either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[4] when in

Master mode for the Serial Peripheral Interface A (DSPI_A). It can be configured to wake the system out

of low-power mode (DOZE) when an external signal is applied using the interrupt functionality.

4.3.72

PG[13] / PCS[3] — Port G I/O Pin and DSPI_A

PG[13] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide

either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[3] when in

Master mode for the Serial Peripheral Interface A (DSPI_A). It can be configured to wake the system out

of low-power mode (DOZE) when an external signal is applied using the interrupt functionality.

4.3.73

PG[14] / PCS[4] — Port G I/O Pin and DSPI_B

PG[14] is a configurable general purpose input or output pin. It can be configured to provide either high

or reduced output drives, to enable or disable either a pull-up or pull-down resistors on the pin or to provide

either an open drain or push-pull pad. The pins can be configured as a chip select pin PCS[4] when in

Master mode for the Serial Peripheral Interface B (DSPI_B). It can be configured to wake the system out

of low-power mode (DOZE) when an external signal is applied using the interrupt functionality.

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