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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT90PWM2 데이터시트(PDF) 257 Page - ATMEL Corporation |
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AT90PWM2 데이터시트(HTML) 257 Page - ATMEL Corporation |
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257 / 361 page  257 4317J–AVR–08/10 AT90PWM2/3/2B/3B Set this bit to short-circuit the Amplifier 1 input. Clear this bit to normally use the Amplifier 1. • Bit 5, 4– AMP1G1, 0: Amplifier 1 Gain Selection Bits These 2 bits determine the gain of the amplifier 0. The different setting are shown in Table 21-10. To ensure an accurate result, after the gain value has been changed, the amplifier input needs to have a quite stable input value during at least 4 Amplifier synchronization clock periods. • Bit 1, 0– AMP1TS1, AMP1TS0: Amplifier 1 Trigger Source Selection Bits In accordance with the Table 21-11, these 2 bits select the event which will generate the trigger for the amplifier 1. This trigger source is necessary to start the conversion on the amplified channel. Table 21-10. Amplifier 1 Gain Selection AMP1G1 AMP1G0 Description 00 Gain 5 01 Gain 10 10 Gain 20 11 Gain 40 Table 21-11. AMP1 Auto Trigger source selection AMP1TS1 AMP1TS0 Description 0 0 Auto synchronization on ADC Clock/8 0 1 Trig on PSC0ASY 1 0 Trig on PSC1ASY 1 1 Trig on PSC2ASY |
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