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70592C 데이터시트(PDF) 247 Page - Microchip Technology |
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70592C 데이터시트(HTML) 247 Page - Microchip Technology |
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247 / 314 page ![]() © 2011 Microchip Technology Inc. DS70592C-page 247 PIC24HJXXXGPX06A/X08A/X10A TABLE 24-9: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS DC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤TA ≤+85°C for Industrial -40°C ≤TA ≤+125°C for Extended Param No. Symbol Characteristic Min Typ(1) Max Units Conditions VIL Input Low Voltage DI10 I/O pins VSS —0.2 VDD V DI15 MCLR VSS —0.2 VDD V DI16 I/O Pins with OSC1 or SOSCI VSS —0.2 VDD V DI18 I/O Pins with I2CVSS — 0.3 VDD V SMbus disabled DI19 I/O Pins with I2C VSS — 0.8 V V SMbus enabled VIH Input High Voltage DI20 I/O Pins Not 5V Tolerant(4) I/O Pins 5V Tolerant(4) 0.7 VDD 0.7 VDD — — VDD 5.5 V V DI28 SDAx, SCLx 0.7 VDD — 5.5 V SMbus disabled DI29 SDAx, SCLx 2.1 — 5.5 V SMbus enabled ICNPU CNx Pull-up Current DI30 50 250 400 μAVDD = 3.3V, VPIN = VSS IIL Input Leakage Current(2,3) DI50 I/O Pins 5V Tolerant(4) —— ±2 μAVSS ≤ VPIN ≤ VDD, Pin at high-impedance DI51 I/O Pins Not 5V Tolerant(4) —— ±1 μAVSS ≤ VPIN ≤ VDD, Pin at high-impedance, -40°C ≤TA ≤+85°C DI51a I/O Pins Not 5V Tolerant(4) —— ±2 μA Shared with external reference pins, -40°C ≤TA ≤+85°C DI51b I/O Pins Not 5V Tolerant(4) —— ±3.5 μAVSS ≤ VPIN ≤ VDD, Pin at high-impedance, -40°C ≤TA ≤+125°C DI51c I/O Pins Not 5V Tolerant(4) —— ±8 μA Analog pins shared with external reference pins, -40°C ≤TA ≤+125°C DI55 MCLR —— ±2 μAVSS ≤ VPIN ≤ VDD DI56 OSC1 — — ±2 μAVSS ≤ VPIN ≤ VDD, XT and HS modes Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. 4: See “Pin Diagrams” for a list of 5V tolerant pins. 5: VIL source < (VSS – 0.3). Characterized but not tested. 6: Non-5V tolerant pins VIH source > (VDD + 0.3), 5V tolerant pins VIH source > 5.5V. Characterized but not tested. 7: Digital 5V tolerant pins cannot tolerate any “positive” input injection current from input sources > 5.5V. 8: Injection currents > | 0 | can affect the ADC results by approximately 4-6 counts. 9: Any number and/or combination of I/O pins not excluded under IICL or IICH conditions are permitted pro- vided the mathematical “absolute instantaneous” sum of the input injection currents from all pins do not exceed the specified limit. Characterized but not tested. |
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