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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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900844 데이터시트(PDF) 101 Page - Freescale Semiconductor, Inc |
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900844 데이터시트(HTML) 101 Page - Freescale Semiconductor, Inc |
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101 / 118 page  Analog Integrated Circuit Device Data Freescale Semiconductor 101 900844 FUNCTIONAL DEVICE OPERATION SPI REGISTER MAP SPI REGISTER MAP OVERVIEW The SPI frame is organized as 24 bits. The first 16 bits is the write enable bit, 10-bit address and 5 "dead" bits between the data and address fields. The next 8 bits are the data bits. The one write enable bit selects whether the SPI transaction is a read or a write. The addressable register map spans 1024 registers of 8 data bits each. The map is not fully populated. A summarized structure of the register set is given in the following tables. Expanded bit descriptions are included in the individual functional sections for application guidance. GPIINT4 4 GPIO4 Interrupt Flag x0 = No Interrupt occurred or Masked Interrupt x1 = Interrupt occurred GPIINT5 5 GPIO5 Interrupt Flag x0 = No Interrupt occurred or Masked Interrupt x1 = Interrupt occurred GPIINT6 6 GPIO6 Interrupt Flag x0 = No Interrupt occurred or Masked Interrupt x1 = Interrupt occurred GPIINT7 7 GPIO7 Interrupt Flag x0 = No Interrupt occurred or Masked Interrupt x1 = Interrupt occurred Table 73. GPO Register Structure and Bits Description Name Bits Description GPO (ADDR 0xF4 - R/W - Default Value: 0x00) GPO0 0 GPO0 Output Level x0 = Low0 x1 = High (To voltage supplied on GPOVCC Pin) GPO1 1 GPO1 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO2 2 GPO2 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO3 3 GPO3 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO4 4 GPO4 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO5 5 GPO5 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO6 6 GPO6 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) GPO7 7 GPO7 Output Level x0 = Low x1 = High (To voltage supplied on GPOVCC Pin) Table 72. GPIO Register Structure and Bits Description Name Bits Description |
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