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ADAU1373BCBZ-R7 데이터시트(PDF) 161 Page - Analog Devices |
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ADAU1373BCBZ-R7 데이터시트(HTML) 161 Page - Analog Devices |
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161 / 296 page ![]() ADAU1373 Rev. 0 | Page 161 of 296 SRCC_RATIOA REGISTER Address: 0x4E, Reset: 0x00, Name: SRCC_RATIOA Sample Rate Converter C Setting Table 107. Bit Descriptions for SRCC_RATIOA Bits Bit Name Settings Description Reset Access 7 SRCCMODE SRCC Working Mode. SRCC ratio can be set to autodetect or manual mode. In manual mode, the SRCC ratio needs to be set using SRCCINT, SRCCRFRE_HI, and SRCCRFRE_LOW bits. The format is 3.12. 0x0 RW 0 Enable ASRCC ratio autodetect; the data is automatically written in the SRCC INT/FRAC ratio register (default) 1 Disable ASRCC ratio autodetect, using the data set in the SRCC INT/FRAC ratio register [6:4] SRCCINT Integer Part of the SRCC Ratio Setting. 0x0 RW [3:0] SRCCRFRE_HI Upper Four Bits for the SRCC Ratio Setting. 0x0 RW SRCC_RATIOB REGISTER Address: 0x4F, Reset: 0x00, Name: SRCC_RATIOB Sample Rate Converter C Setting Table 108. Bit Descriptions for SRCC_RATIOB Bits Bit Name Settings Description Reset Access [7:0] SRCCRFRE_LOW Lower Byte for the SRCC Ratio Setting. 0x00 RW |
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