전자부품 데이터시트 검색엔진 |
|
Q67000-A9230 데이터시트(PDF) 5 Page - Siemens Semiconductor Group |
|
|
Q67000-A9230 데이터시트(HTML) 5 Page - Siemens Semiconductor Group |
5 / 27 page TDA 4916 GG Semiconductor Group 5 05.96 Circuit Description The individual functional sections of the device and their interactions are described below. Power Supply at V S The device does not enable the output until the turn-ON threshold of V S is exceeded. The duty factor (active time/period) can then rise from zero to the value set with K1 in the time determined by the soft start. The turn-OFF threshold lies below the turn-ON threshold. Below the turn-OFF threshold the output Q SIP is reliably low. Frequency Generator The frequency is mainly determined by close-tolerance external components and the calibrated reference voltage. The switching frequency at the output can be set by suitable choice of R t and Ct. The maximum possible duty factor can be reduced by a defined amount by means of a resistor from C T to 0V GND. The maximum possible duty factor can be increased by a defined amount by means of a resistor from C T to VS. Ramp Generator The ramp generator is controlled by the frequency generator and operates with the same frequency. Capacitor C r on the ramp generator is discharged by an internally-set current and charged via a current set externally. The duration of the falling edge of the ramp generator output must be shorter than its rise time. Only then do the upper and lower switching levels of the ramp generator signal have their nominal values. In “voltage mode control” operation, the rising edge of the ramp generator signal is compared with an externally set dc voltage in comparator K1 for pulse-width control at the output. The slope of the rising edge is set by the current through R r. The voltage source connected to R r can be the SMPS input voltage. This makes it possible to control the duty factor for a constant volt-second product at the output. This control option (precontrol) permits equalization of known disturbances (e.g. input voltage ripple). Superimposed load current control (current mode control) can also be implemented. For this purpose the actual current at the source of the SIPMOS transistor is sensed and compared with the specified value in comparator K5. |
유사한 부품 번호 - Q67000-A9230 |
|
유사한 설명 - Q67000-A9230 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |