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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ANSELA 데이터시트(PDF) 187 Page - Microchip Technology |
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ANSELA 데이터시트(HTML) 187 Page - Microchip Technology |
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187 / 222 page  2013 Microchip Technology Inc. DS22331A-page 187 MCP19111 REGISTER 27-8: SSPMSK2: SSP MASK REGISTER 2 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 MSK2<7:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-1 MSK2<7:1>: Mask bits 1 = The received address bit n is compared to SSPADD2<n> to detect I2C address match 0 = The received address bit n is not used to detect I2C address match bit 0 MSK2<0>: Mask bit for I2C Slave mode, 10-bit Address I2C Slave mode, 10-bit address (SSPM<3:0> = 0111 or 1111): 1 = The received address bit 0 is compared to SSPADD2<0> to detect I2C address match 0 = The received address bit 0 is not used to detect I2C address match I2C Slave mode, 7-bit address, the bit is ignored REGISTER 27-9: SSPADD2: MSSP ADDRESS 2 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 ADD2<7:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown Master mode: bit 7-0 ADD2<7:0>: Baud Rate Clock Divider bits SCL pin clock period = ((ADD<7:0> + 1) *4)/FOSC 10-Bit Slave mode — Most Significant Address byte: bit 7-3 Not used: Unused for Most Significant Address byte. Bit state of this register is a “don’t care”. Bit pattern sent by master is fixed by I2C specification and must be equal to ‘11110’. However, those bits are compared by hardware and are not affected by the value in this register. bit 2-1 ADD2<2:1>: Two Most Significant bits of 10-bit address bit 0 ADD2<0>: SSPADD2 Enable bit. 1 = Enable address matching with SSPADD2 0 = Disable address matching with SSPADD2 10-Bit Slave mode — Least Significant Address byte: bit 7-0 ADD2<7:0>: Eight Least Significant bits of 10-bit address 7-Bit Slave mode: bit 7-1 ADD2<7:1>: 7-bit address bit 0 ADD2<0>: SSPADD2 Enable bit. 1 = Enable address matching with SSPADD2 0 = Disable address matching with SSPADD2 |
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