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INTEDG 데이터시트(PDF) 285 Page - Microchip Technology

부품명 INTEDG
상세설명  64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  478 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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INTEDG 데이터시트(HTML) 285 Page - Microchip Technology

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 2010-2012 Microchip Technology Inc.
DS41414D-page 285
PIC16(L)F1946/47
24.6.13.1
Bus Collision During a Start
Condition
During a Start condition, a bus collision occurs if:
a)
SDAx or SCLx are sampled low at the beginning
of the Start condition (Figure 24-32).
b)
SCLx is sampled low before SDAx is asserted
low (Figure 24-33).
During a Start condition, both the SDAx and the SCLx
pins are monitored.
If the SDAx pin is already low, or the SCLx pin is
already low, then all of the following occur:
• the Start condition is aborted,
• the BCLxIF flag is set and
• the MSSPx module is reset to its Idle state
(Figure 24-32).
The Start condition begins with the SDAx and SCLx
pins deasserted. When the SDAx pin is sampled high,
the Baud Rate Generator is loaded and counts down. If
the SCLx pin is sampled low while SDAx is high, a bus
collision occurs because it is assumed that another
master is attempting to drive a data ‘1’ during the Start
condition.
If the SDAx pin is sampled low during this count, the
BRG is reset and the SDAx line is asserted early
(Figure 24-34). If, however, a ‘1’ is sampled on the
SDAx pin, the SDAx pin is asserted low at the end of
the BRG count. The Baud Rate Generator is then
reloaded and counts down to zero; if the SCLx pin is
sampled as ‘0’ during this time, a bus collision does not
occur. At the end of the BRG count, the SCLx pin is
asserted low.
FIGURE 24-33:
BUS COLLISION DURING START CONDITION (SDAX ONLY)
Note:
The reason that bus collision is not a fac-
tor during a Start condition is that no two
bus masters can assert a Start condition
at the exact same time. Therefore, one
master will always assert SDAx before the
other. This condition does not cause a bus
collision because the two masters must be
allowed to arbitrate the first address fol-
lowing the Start condition. If the address is
the same, arbitration must be allowed to
continue into the data portion, Repeated
Start or Stop conditions.
SDAx
SCLx
SEN
SDAx sampled low before
SDAx goes low before the SEN bit is set.
S bit and SSPxIF set because
SSPx module reset into Idle state.
SEN cleared automatically because of bus collision.
S bit and SSPxIF set because
Set SEN, enable Start
condition if SDAx = 1, SCLx = 1
SDAx = 0, SCLx = 1.
BCLxIF
S
SSPxIF
SDAx = 0, SCLx = 1.
SSPxIF and BCLxIF are
cleared by software
SSPxIF and BCLxIF are
cleared by software
Set BCLxIF,
Start condition. Set BCLxIF.



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