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STM32F407IGH6 데이터시트(PDF) 126 Page - STMicroelectronics |
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STM32F407IGH6 데이터시트(HTML) 126 Page - STMicroelectronics |
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126 / 185 page ![]() Electrical characteristics STM32F405xx, STM32F407xx 126/185 DocID022152 Rev 4 Figure 46. ULPI timing diagram Ethernet characteristics Unless otherwise specified, the parameters given in Table 64, Table 65 and Table 66 for SMI, RMII and MII are derived from tests performed under the ambient temperature, fHCLK frequency summarized in Table 14 and VDD supply voltage conditions summarized in Table 63, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD. Refer to Section 5.3.16: I/O port characteristics for more details on the input/output characteristics. 1. Guaranteed by design, not tested in production. Table 62. ULPI timing Parameter Symbol Value(1) 1. VDD = 2.7 V to 3.6 V and TA = –40 to 85 °C. Unit Min. Max. Control in (ULPI_DIR) setup time tSC -2.0 ns Control in (ULPI_NXT) setup time - 1.5 Control in (ULPI_DIR, ULPI_NXT) hold time tHC 0- Data in setup time tSD -2.0 Data in hold time tHD 0- Control out (ULPI_STP) setup time and hold time tDC -9.2 Data out available from clock rising edge tDD -10.7 Clock Control In (ULPI_DIR, ULPI_NXT) data In (8-bit) Control out (ULPI_STP) data out (8-bit) tDD tDC tHD tSD tHC tSC ai17361c tDC |
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