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ML4425 데이터시트(PDF) 10 Page - Fairchild Semiconductor |
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ML4425 데이터시트(HTML) 10 Page - Fairchild Semiconductor |
10 / 16 page ML4425 PRODUCT SPECIFICATION 10 REV. 1.0.2 7/2/01 Back EMF Sensing PLL Commutation Control Three blocks form a phase locked loop that locks the com- mutation clock onto the back EMF signal: the commutation state machine, the voltage controlled oscillator, and the back EMF sampler. The complete phase locked loop is illustrated in Figure 7. The phased locked loop requires a lead lag filter that is set by external components on SPEED FB. The com- ponents are selected as follows: Start-Up Sequence When power is first applied to the ML4425 and the motor is at rest, the back EMF is equal to zero. The motor needs to be rotating for the back EMF sampler to lock onto the rotor position and commutate the motor. The ML4425 uses an open loop start-up technique to bring the rotor from rest up to a speed fast enough to allow back EMF sensing. Start-up is comprised of three modes: align mode, ramp mode, and run mode. Align Mode (RESET) Before the motor can be started, the rotor must be in a known position. When power is first applied to the ML4425, the controller is reset into the align mode. Align mode turns on the output drivers LB, HA, and HC which aligns the motor into a position 30 electrical degrees before the center of the first commutation state. This is shown as state R in the com- mutation states of Table 1. Align mode must last long enough to allow the motor and its load to settle into this position. The align mode time is set by a capacitor connected to the CAT pin as shown in Figure 8. CAT is charged by a constant 750µA current from GND to 1.5 V until the align comparator trips to end the align mode. A starting point for CAT is calcu- lated as follows: If the align time is not long enough to allow the rotor to settle for reliable starting, then increase CAT until the desired per- formance is achieved. Figure 7. Back EMF Commutation Phase Locked Loop Ramp Mode At the end of align mode the controller goes into ramp mode. Ramp mode starts commutating through the states A through F as shown in Table 1. This ramps up the commutation fre- quency, and therefore the motor speed, for a fixed length of time. This allows the motor to reach a sufficient speed for the back EMF sampler to lock commutation onto the motor’s back EMF. The amount of time the ML4425 stays in ramp mode is determined by a capacitor connected to the CRT pin as shown in Figure 8. CRT is charged by a constant 750µA current from GND to 1.5 V until the ramp comparator trips to end the ramp mode. This gives a fixed ramp time. CRT is calculated as follows: The rate at which the ML4425 ramps up the motor speed is determined by a fixed 500µA current source on the SPEED FB pin. The current sources charges up the PLL filter com- ponents causing the VCO frequency to ramp up. During ramp mode, the back EMF sampler is disabled to allow con- trol of the ramping to be set only by the 500µA current source. The ramp based on the SPEED FB filter is generally too fast for the motor to keep up, so a capacitor from CRR to SPEED FB can be added to slow down the ramping rate. The optimal ramp rate is based on the motor and load parameters and is can be adjusted by varying the value of CRR. C SPEEDFB1 0.25 K O1 M ---------- N S 2 In d 100 ---------- 2 f VCO 2 × ------------------------------------------------- × × = (6a) R SPEEDFB 2 = MIn d 100 ---------- × × f VCO N S K O1 × 1M – () × -------------------------------------------------- × (6b C SPEEDFB2 C SPEEDFB1 = M1 – () × (6c) C AT t S 7.5 × 10 7 – amp × × 1.5V -------------------------------------------------------- = (7) FB A 22 FB B 23 FB C 24 BACK EMF SAMPLER VDD 500nA SPEED FB CSPEEDFB1 CSPEEDFB2 RSPEEDFB 20 VOLTAGE CONTROLLED OSCILLATOR PHASE LOCKED LOOP VCO/TACH 13 A B C D E F R COMMUTATION STATE MACHINE C RT 2 π J × 5 × 10 7 – × amp × K V × I MAX K t × 3 × N × ---------------------------------------------------------------------------- = (8) |
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