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DSPIC33FJ12GP201TE/ML 데이터시트(PDF) 134 Page - Microchip Technology |
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DSPIC33FJ12GP201TE/ML 데이터시트(HTML) 134 Page - Microchip Technology |
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134 / 242 page ![]() dsPIC33FJ12GP201/202 DS70264B-page 132 Preliminary © 2007 Microchip Technology Inc. FIGURE 13-1: OUTPUT COMPARE MODULE BLOCK DIAGRAM OCxR(1) Comparator Output Logic OCM2:OCM0 Output Enable OCx(1) Set Flag bit OCxIF(1) OCxRS(1) Mode Select 3 Note 1: Where ‘x’ is shown, reference is made to the registers associated with the respective output compare channels 1 through 8. 2: OCFA pin controls OC1-OC2 channels. 3: TMR2/TMR3 can be selected via OCTSEL(OCxOCN<3>) bit. OCTSEL 0 1 16 16 OCFA(2) TMR register inputs from time bases(3) Period match signals from time bases(3) 0 1 Q S R |
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