| 전자부품 데이터시트 검색엔진 |
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DSPIC33FJ06GS101TE/ML 데이터시트(PDF) 204 Page - Microchip Technology |
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DSPIC33FJ06GS101TE/ML 데이터시트(HTML) 204 Page - Microchip Technology |
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204 / 346 page ![]() dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 DS70318D-page 202 Preliminary © 2009 Microchip Technology Inc. REGISTER 15-4: SEVTCMP: PWM SPECIAL EVENT COMPARE REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 SEVTCMP <15:8> bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 SEVTCMP <7:3> — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-3 SEVTCMP<15:3> : Special Event Compare Count Value bits bit 2-0 Unimplemented: Read as ‘0’ REGISTER 15-5: MDC: PWM MASTER DUTY CYCLE REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 MDC<15:8> bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 MDC<7:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-0 MDC<15:0>: Master PWM Duty Cycle Value bits Note 1: The smallest pulse width that can be generated on the PWM output corresponds to a value of 0x0008, while the maximum pulse width generated corresponds to a value of Period – 0x0008. 2: As the duty cycle gets closer to 0% or 100% of the PWM period (0 ns-40 ns, depending on the mode of operation), the PWM duty cycle resolution will degrade from 1 LSB to 3 LSB. |
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