DSPIC33FJ06GS101TESLASHML datasheet(253/346 Pages) MICROCHIP

253 / 346 page

Preliminary

DS70318D-page 251

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

ADCPC1: A/D CONVERT PAIR CONTROL REGISTER 1

R/W-0

IRQEN3(1)

PEND3(1)

SWTRG3(1)

TRGSRC3<4:0>(1)

bit 15

bit 8

R/W-0

IRQEN2(2)

PEND2(2)

SWTRG2(2)

TRGSRC2<4:0>(2)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

IRQEN3:

Interrupt Request Enable 3 bit(1)

= Enable IRQ generation when requested conversion of channels AN7 and AN6 is completed

= IRQ is not generated

bit 14

PEND3:

Pending Conversion Status 3 bit(1)

= Conversion of channels AN7 and AN6 is pending. Set when selected trigger is asserted

= Conversion is complete

bit 13

SWTRG3:

Software Trigger 3 bit(1)

= Start conversion of AN7 and AN6 (if selected in TRGSRC bits)(3)

This bit is automatically cleared by hardware when the PEND3 bit is set.

= Conversion is not started

Note 1:

These bits are available in the dsPIC33FJ16GS402/404, dsPIC33FJ16GS504, dsPIC33FJ16GS502 and

dsPIC33FJ06GS101 devices only.

These bits are available in the dsPIC33FJ16GS502, dsPIC33FJ16GS504, dsPIC33FJ06GS102,

dsPIC33FJ06GS202 and dsPIC33FJ16GS402/404 devices only.

If other conversions are in progress, then conversion will be performed when the conversion resources are

available.

DSPIC33FJ06GS101TE/ML 데이터시트(PDF) 253 Page - Microchip Technology

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