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DSPIC33FJ06GS101TE/ML 데이터시트(PDF) 335 Page - Microchip Technology

부품명 DSPIC33FJ06GS101TE/ML
상세설명  High-Performance, 16-bit Digital Signal Controllers
PDF  346 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ06GS101TE/ML 데이터시트(HTML) 335 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 333
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Revision C and D (March 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
OSCO to OSC2
• Changed all instances of PGCx/EMUCx and
PGDx/EMUDx (where x = 1, 2, or 3) to PGECx
and PGEDx
• Changed all instances of VDDCORE and VDDCORE/
VCAP to VCAP/VDDCORE
Other major changes are referenced by their respective
section in the following table.
TABLE A-2:
MAJOR SECTION UPDATES
Section Name
Update Description
“High-Performance, 16-Bit Digital
Signal Controllers”
Added “Application Examples” to list of features
Updated all pin diagrams to denote the pin voltage tolerance (see “Pin
Diagrams”
).
Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin diagrams, which
references pin connections to VSS.
Section 1.0 “Device Overview”
Added ACMP1-ACMP4 pin names and Peripheral Pin Select capability
column to Pinout I/O Descriptions (see Table 1-1).
Section 2.0 “Guidelines for Getting
Started with 16-bit Digital Signal
Controllers”
Added new section to the data sheet that provides guidelines on getting
started with 16-bit Digital Signal Controllers.
Section 3.0 “CPU”
Updated CPU Core Block Diagram with a connection from the DSP Engine
to the Y Data Bus (see Figure 3-1).
Vertically extended the X and Y Data Bus lines in the DSP Engine Block
Diagram (see Figure 3-3).
Section 4.0 “Memory Organization”
Updated Reset value for ADCON in Table 4-25.
Removed reference to dsPIC33FJ06GS102 devices in the PMD Register
Map and updated bit definitions for PMD1 and PMD6, and removed PMD7
(see Table 4-43).
Added a new PMD Register Map, which references dsPIC33FJ06GS102
devices (see Table 4-44).
Updated RAM stack address and SPLIM values in the third paragraph of
Section 4.2.6 “Software Stack”
Removed Section 4.2.7 “Data Ram Protection Feature”.
Section 5.0 “Flash Program
Memory”
Updated Section 5.3 “Programming Operations” with programming time
formula.



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