| 전자부품 데이터시트 검색엔진 |
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DSPIC33FJ06GS101TE/ML 데이터시트(PDF) 153 Page - Microchip Technology |
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DSPIC33FJ06GS101TE/ML 데이터시트(HTML) 153 Page - Microchip Technology |
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153 / 346 page ![]() © 2009 Microchip Technology Inc. Preliminary DS70318D-page 151 dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 REGISTER 9-3: PMD3: PERIPHERAL MODULE DISABLE CONTROL REGISTER 3 REGISTER 9-4: PMD4: PERIPHERAL MODULE DISABLE CONTROL REGISTER 4 U-0 U-0 U-0 U-0 U-0 R/W-0 U-0 U-0 — — — — —CMPMD — — bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-11 Unimplemented: Read as ‘0’ bit 10 CMPMD : Analog Comparator Module Disable bit 1 = Analog comparator module is disabled 0 = Analog comparator module is enabled bit 9-0 Unimplemented: Read as ‘0’ U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 U-0 R/W-0 U-0 U-0 U-0 — — — —REFOMD — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-4 Unimplemented: Read as ‘0’ bit 3 REFOMD : Reference Clock Generator Module Disable bit 1 = Reference clock generator module is disabled 0 = Reference clock generator module is enabled bit 2-0 Unimplemented: Read as ‘0’ |
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