AM79C973VCW datasheet(197/304 Pages) AMD

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Am79C973/Am79C975

197

P R E L I M INARY

ANR4: Auto-Negotiation Advertisement Register

(Register 4)

This register contains the advertised ability of the

Am79C973/Am79C975 device. The purpose of this

partner device. See Table 44.

When this register is modified, Re s tar t Au to -

Negotiation (Register 0, bit 9) must be enabled to guar-

antee the change is implemented.

Table 44. ANR4: Auto-Negotiation Advertisement Register (Register 4)

Bit(s)

Name

Description

Read/

Write

H/W or Soft

Reset

When set, the device wishes to engage in next page exchange. If

clear, the device does not wish to engage in next page exchange.

R/W

Reserved

Remote Fault

When set, a remote fault bit is inserted into the base link code

word during the Auto Negotiation process. When cleared, the

base link code work will have the bit position for remote fault as

cleared.

R/W

12:11

Reserved

PAUSE

This bit should be set if the PAUSE capability is to be advertised.

R/W

Reserved

Full Duplex -

100BASE-TX

This bit advertises Full Duplex capability. When set, Full Duplex

capability is advertised. When cleared, Full Duplex capability is

not advertised.

R/W

Half duplex -

100BASE-TX

This bit advertises Half Duplex capability for the Auto-negotiation

process. Setting this bit advertises Half Duplex capability. Clearing

this bit does not advertise Half Duplex capability.

R/W

Full Duplex -

10BASE-T

This bit advertises Full Duplex capability. When set, Full Duplex

capability is advertised. When cleared, Full Duplex capability is

not advertised.

R/W

Half duplex -

10BASE-T

This bit advertises Half Duplex capability for the Auto-negotiation

process. Setting this bit advertises Half Duplex capability. Clearing

this bit does not advertise Half Duplex capability.

R/W

4:0

Selector Field

The Am79C973/Am79C975 device is an 802.3 compliant device

0x01

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