ST72561 datasheet(248/262 Pages) STMICROELECTRONICS

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ST72561

248/262

ADC CHARACTERISTICS (Cont’d)

12.13.0.1 Analog Power Supply and Reference

Pins

Depending on the MCU pin count, the package

may feature separate VDDA and VSSA analog pow-

er supply pins. These pins supply power to the A/D

converter cell and function as the high and low ref-

erence voltages for the conversion. In smaller

packages VDDA and VSSA pins are not available

and the analog supply and reference pads are in-

ternally bonded to the VDD and VSS pins.

Separation of the digital and analog power pins al-

low board designers to improve A/D performance.

Conversion accuracy can be impacted by voltage

drops and noise in the event of heavily loaded or

badly decoupled power supply lines (see Section

12.13.0.2 "General PCB Design Guidelines").

12.13.0.2 General PCB Design Guidelines

To obtain best results, some general design and

layout rules should be followed when designing

the application PCB to shield the the noise-sensi-

tive, analog physical interface from noise-generat-

ing CMOS logic signals.

– Use separate digital and analog planes. The an-

alog ground plane should be connected to the

digital ground plane via a single point on the

PCB.

– Filter power to the analog power planes. It is rec-

ommended to connect capacitors, with good high

frequency characteristics, between the power

and ground lines, placing 0.1µF and optionally, if

needed 10pF capacitors as close as possible to

the ST7 power supply pins and a 1 to 10µF ca-

pacitor close to the power source (see Figure

147).

– The analog and digital power supplies should be

connected in a star nework. Do not use a resis-

tor, as VDDA is used as a reference voltage by the

A/D converter and any resistance would cause a

voltage drop and a loss of accuracy.

– Properly place components and route the signal

traces on the PCB to shield the analog inputs.

Analog signals paths should run over the analog

ground plane and be as short as possible. Isolate

analog signals from digital signals that may

switch while the analog inputs are being sampled

by the A/D converter. Do not toggle digital out-

puts on the same I/O port as the A/D input being

converted.

12.13.0.3

Software

Filtering

Spurious

Conversion Results

For EMC performance reasons, it is recommend-

ed to filter A/D conversion outliers using software

filtering techniques.

Figure 147. Power Supply Filtering

VSS

VDD

0.1

µF

VDD

ST72XXX

VDDA

VSSA

POWER

SUPPLY

SOURCE

ST7

DIGITAL NOISE

FILTERING

EXTERNAL

NOISE

FILTERING

1 to 10

µF

0.1

µF

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