 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ST7MC1K2TC 데이터시트(PDF) 257 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7MC1K2TC 데이터시트(HTML) 257 Page - STMicroelectronics |
|
|
257 / 308 page  ST7MC1/ST7MC2 257/308 CLOCK AND TIMING CHARACTERISTICS (Cont’d) 12.5.4 Clock Security System with PLL Table 88. PLL Characteristics Table 89. Clock Detector Characteristics Notes: 1. Data based on characterization results, not tested in production. Symbol Parameter Min Typ Max Unit fOSC PLL input frequency range 7 8 MHz Output Frequency Output frequency when the PLL attain lock. 16 MHz tLock PLL Lock Time (LOCKED = 1) 50 100 µs Jitter Jitter in the output clock 2 % fCPU CPU clock frequency when VCO is con- nected to ground (ICD internal clock or back up oscillator ) 3MHz Symbol Parameter Min Typ Max Unit fDetect Detected Minimum Input Frequency 500 1) KHz tsetup Time needed to detect OSCIN once CKD is enabled 3 µs thold Time needed to detect that OSCIN stops 3 µs |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
