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STLUX325ATR 데이터시트(PDF) 110 Page - STMicroelectronics |
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STLUX325ATR 데이터시트(HTML) 110 Page - STMicroelectronics |
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110 / 126 page ![]() Electrical characteristics STLUX 110/126 DocID027870 Rev 1 12.3.10 10-bit SAR ADC characteristics Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise specified. Table 88. ADC characteristics Symbol Parameter Conditions Min. Typ. Max. Unit N Resolution 10 bit RADCIN ADC input impedance 1 M fADC ADC Clock frequency 1 6(1) 1. Frequency generated selecting the PLL source clock. MHz VIN1 Conversion voltage range for gain x1 0 1.25(2), (3) 2. Maximum input analog voltage cannot exceed VDDA. 3. Exceeding the maximum voltage on the ADCIN [7:0] signals (product depending) for the related conversion scale must be avoided since the ADC conversion accuracy can be impacted. VIN2 Conversion voltage range for gain x4(4) 4. Product depending. 00.3125(2), (3) Vref ADC main reference voltage(5) 5. ADC reference voltage at TA = 25 °C. 1.250 V tS Sampling time fADC = 6 MHz 0.50 µs tSTAB Wakeup time from ADC standby 30 tCONV1 Single conversion time including sampling time fADC = 6 MHz 2.42 tCONV2 Continuous conversion time including sampling time fADC = 6 MHz 3 |
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