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PC87364-XXX/VLA 데이터시트(PDF) 177 Page - National Semiconductor (TI) |
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PC87364-XXX/VLA 데이터시트(HTML) 177 Page - National Semiconductor (TI) |
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177 / 180 page ![]() 10.0 Device Characteristics (Continued) 175 www.national.com 10.4.10 Standard Parallel Port Timing Typical Data Exchange 10.4.11 Enhanced Parallel Port Timing Symbol Parameter Conditions Typ Max Unit tPDH Port Data Hold These times are system dependent and are therefore not tested. 500 ns tPDS Port Data Setup These times are system dependent and are therefore not tested. 500 ns tSW Strobe Width These times are system dependent and are therefore not tested. 500 ns Symbol Parameter Min Max EPP 1.7 EPP 1.9 Unit tWW19a WRITE Active from WAIT Low 45 ns tWW19ia WRITE Inactive from WAIT Low 45 ns tWST19a DSTRB or ASTRB Active from WAIT Low 65 ns tWEST DSTRB or ASTRB Active after WRITE Active 10 ns tWPDH PD7-0 Hold after WRITE Inactive 0 ns tWPDS PD7-0 Valid after WRITE Active 15 ns tEPDW PD7-0 Valid Width 80 ns tEPDH PD7-0 Hold after DSTRB or ASTRB Inactive 0 ns tPDS tPDH tSW BUSY ACK PD7-0 STB WRITE DSTRB ASTRB PD7-0 WAIT Valid tWW19ia tWPDH tEPDH tEPDW or tWW19a tWST19a tWPDS tWEST tWST19a |
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