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TNETV2685FIBZUT9 데이터시트(PDF) 114 Page - Texas Instruments |
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TNETV2685FIBZUT9 데이터시트(HTML) 114 Page - Texas Instruments |
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114 / 191 page ![]() AECLKOUT ACEx ABE[1:0] AEA[23:0]/ ABA[1:0] AED[15:0] AAOE ASOE / AR/W AAWE ASWE / AARDY Byte Enables Address Read Data Hold = 1 2 Strobe = 4 Setup = 1 2 2 4 10 10 1 1 1 3 DEASSERTED AECLKOUT ACEx ABE[1:0] AEA[23:0]/ ABA[1:0] AED[15:0] AAOE ASOE / (A) AR/W AAWE ASWE / (A) AARDY (B) Byte Enables Address Write Data Hold = 1 12 Strobe = 4 Setup = 1 12 12 12 12 13 13 11 11 11 11 11 DEASSERTED TMS320DM647 TMS320DM648 SPRS372H – MAY 2007 – REVISED APRIL 2012 www.ti.com A. AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE (identified under select signals) and AAWE/ASWE, respectively, during asynchronous memory accesses. B. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-21. Asynchronous Memory Read Timing for EMIFA A. AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE and AAWE/ASWE (identified under select signals) during asynchronous memory accesses. B. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-22. Asynchronous Memory Write Timing for EMIFA 114 Peripheral Information and Electrical Specifications Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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