ST72361AR4-Auto datasheet(136/279 Pages) STMICROELECTRONICS

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8-bit timer (TIM8)

ST72361xx-Auto

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Doc ID 12468 Rev 3

set and IC2R can be loaded) but the user must take care that the counter is reset each

period and ICF1 can also generates interrupt if ICIE is set.

When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the

PWM mode is the only active one.

13.4

Low power modes

13.5

Interrupts

Note:

The 8-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts

chapter). These events generate an interrupt if the corresponding Enable Control Bit is set

and the interrupt mask in the CC register is reset (RIM instruction).

Table 52.

Effect of low power modes on TIM8

Mode

Description

WAIT

No effect on 8-bit Timer.

Timer interrupts cause the device to exit from WAIT mode.

HALT

8-bit Timer registers are frozen.

In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes

from the previous count when the MCU is woken up by an interrupt with “exit from HALT

mode” capability or from the counter reset value when the MCU is woken up by a RESET.

If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is

armed. Consequently, when the MCU is woken up by an interrupt with “exit from HALT

mode” capability, the ICFi bit is set, and the counter value present when exiting from HALT

mode is captured into the ICiR register.

Table 53.

TIM8 interrupt control and wake-up capability

Interrupt event

Event

flag

Enable

control

bit

Exit

from

wait

Exit

from

halt

Input Capture 1 event/Counter reset in PWM mode

ICF1

ICIE

Yes

Input Capture 2 event

ICF2

Output Compare 1 event (not available in PWM mode)

OCF1

OCIE

Output Compare 2 event (not available in PWM mode)

OCF2

Timer Overflow event

TOF

TOIE

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