ST72361AR4-Auto datasheet(197/279 Pages) STMICROELECTRONICS

197 / 279 page

ST72361xx-Auto

LINSCI serial communication interface (LIN master only)

Doc ID 12468 Rev 3

197/279

Character transmission

During an SCI transmission, data shifts out least significant bit first on the TDO pin. In this

mode, the SCIDR register consists of a buffer (TDR) between the internal bus and the

transmit shift register (see Figure 89).

Procedure

●

Select the M bit to define the word length.

●

Select the desired baud rate using the SCIBRR and the SCIETPR registers.

●

Set the TE bit to send an idle frame as first transmission.

●

Access the SCISR register and write the data to send in the SCIDR register (this

sequence clears the TDRE bit). Repeat this sequence for each data to be transmitted.

Clearing the TDRE bit is always performed by the following software sequence:

An access to the SCISR register

A write to the SCIDR register

The TDRE bit is set by hardware and it indicates:

●

The TDR register is empty.

●

The data transfer is beginning.

●

The next data can be written in the SCIDR register without overwriting the previous

data.

This flag generates an interrupt if the TIE bit is set and the I bit is cleared in the CCR

When a transmission is taking place, a write instruction to the SCIDR register stores the

data in the TDR register and which is copied in the shift register at the end of the current

transmission.

When no transmission is taking place, a write instruction to the SCIDR register places the

data directly in the shift register, the data transmission starts, and the TDRE bit is

immediately set.

When a frame transmission is complete (after the stop bit or after the break frame) the TC

bit is set and an interrupt is generated if the TCIE is set and the I bit is cleared in the CCR

Clearing the TC bit is performed by the following software sequence:

An access to the SCISR register

A write to the SCIDR register

Note:

The TDRE and TC bits are cleared by the same software sequence.

Break characters

Setting the SBK bit loads the shift register with a break character. The break frame length

depends on the M bit (see Figure 89).

As long as the SBK bit is set, the SCI send break frames to the TDO pin. After clearing this

bit by software the SCI insert a logic 1 bit at the end of the last break frame to guarantee the

recognition of the start bit of the next frame.

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