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ST72561J4-Auto 데이터시트(PDF) 160 Page - STMicroelectronics

부품명 ST72561J4-Auto
상세설명  Clock, reset and supply management
PDF  324 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST72561J4-Auto 데이터시트(HTML) 160 Page - STMicroelectronics

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LINSCI serial communication interface (LIN master/slave)
ST72561-Auto
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Doc ID 12370 Rev 8
Figure 77.
SCI block diagram (in conventional baud rate generator mode)
15.5
SCI mode - functional description
15.5.1
Conventional baud rate generator mode
The block diagram of the serial control interface in conventional baud rate generator mode is
shown in Figure 77.
It uses four registers:
●
2 control registers (SCICR1 and SCICR2)
●
A status register (SCISR)
●
A baud rate register (SCIBRR)
WAKE
UP
UNIT
RECEIVER
CONTROL
SCISR
TRANSMIT
CONTROL
TDRE TC RDRF IDLE
OR/
NF
FE
PE
SCI
CONTROL
INTERRUPT
SCICR1
R8
T8
SCID
M
WAKE PCE
PS PIE
Received Data Register (RDR)
Receive Shift Register
Read
Transmit Data Register (TDR)
Transmit Shift Register
Write
RDI
TDO
(DATA REGISTER) SCIDR
TRANSMITTER
CLOCK
RECEIVER
CLOCK
RECEIVER RATE
TRANSMITTER RATE
SCIBRR
SCP1
fCPU
CONTROL
CONTROL
SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0
/PR
/16
CONVENTIONAL BAUD RATE GENERATOR
SBK
RWU
RE
TE
ILIE
RIE
TCIE
TIE
SCICR2
LHE



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