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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72561J4-Auto 데이터시트(PDF) 197 Page - STMicroelectronics |
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ST72561J4-Auto 데이터시트(HTML) 197 Page - STMicroelectronics |
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197 / 324 page  ST72561-Auto LINSCI serial communication interface (LIN master only) Doc ID 12370 Rev 8 197/324 Figure 88. SCI block diagram 16.4 Functional description The block diagram of the serial control interface, is shown in Figure 88. It contains seven dedicated registers: ● Three control registers (SCICR1, SCICR2 and SCICR3) ● A status register (SCISR) ● A baud rate register (SCIBRR) ● An extended prescaler receiver register (SCIERPR) ● An extended prescaler transmitter register (SCIETPR) WAKE UP UNIT RECEIVER CONTROL SCISR TRANSMIT CONTROL TDRE TC RDRF IDLE OR NF FE SCI CONTROL INTERRUPT SCICR1 R8 T8 M WAKE Received Data Register (RDR) Received Shift Register Read Transmit Data Register (TDR) Transmit Shift Register Write RDI TDO (DATA REGISTER) SCIDR TRANSMITTER CLOCK RECEIVER CLOCK RECEIVER RATE TRANSMITTER RATE SCIBRR SCP1 fCPU CONTROL CONTROL SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0 /PR /16 CONVENTIONAL BAUD RATE GENERATOR SBK RWU RE TE ILIE RIE TCIE TIE SCICR2 SCICR3 LINE -- CPOL CPHA LBCL CLOCK EXTRACTION PHASE AND POLARITY CONTROL SCLK SCID PCE PS PIE PE CLKEN |
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