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ST72561J4-Auto 데이터시트(PDF) 225 Page - STMicroelectronics |
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ST72561J4-Auto 데이터시트(HTML) 225 Page - STMicroelectronics |
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225 / 324 page ![]() ST72561-Auto beCAN controller (beCAN) Doc ID 12370 Rev 8 225/324 Furthermore, the filters can be configured in mask mode or in identifier list mode. Mask mode In mask mode the identifier registers are associated with mask registers specifying which bits of the identifier are handled as “must match” or as “don’t care”. Identifier list mode In identifier list mode, the mask registers are used as identifier registers. Thus instead of defining an identifier and a mask, two identifiers are specified, doubling the number of single identifiers. All bits of the incoming identifier must match the bits specified in the filter registers. Figure 102. Filter bank scale configuration - register organization Filter bank scale and mode configuration The filter banks are configured by means of the corresponding CFCRx register. To configure a filter bank this must be deactivated by clearing the FACT bit in the CFCR register. The filter scale is configured by means of the FSC[1:0] bits in the corresponding CFCR register, refer One 32-Bit Filter Two 16-Bit Filters One 16-Bit / Two 8-Bit Filters Four 8-Bit Filters CFxR0 CFxR4 CFxR1 CFxR5 CFxR2 CFxR6 CFxR3 CFxR7 CFxR0 CFxR2 CFxR1 CFxR3 CFxR4 CFxR6 CFxR5 CFxR7 CFxR0 CFxR2 CFxR1 CFxR3 CFxR4 CFxR5 CFxR6 CFxR7 CFxR0 CFxR1 CFxR2 CFxR3 CFxR4 CFxR5 CFxR6 CFxR7 x = filter bank number FSCx = 3 FSCx = 2 FSCx = 1 FSCx = 0 Filter Bank Scale Configuration 1 These bits are located in the CFCR register Filter Bank Scale Config. Bits1 Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. Identifier Mask/Ident. STID10:3 STID2:0 RTR IDE EXID17:15 EXID14:7 EXID6:0 Bit Mapping STID10:3 Bit Mapping STID10:3 Identifier Mask/Ident. Bit Mapping STID2:0 RTR IDE EXID17:15 |
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