전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ST72561J4-Auto 데이터시트(PDF) 232 Page - STMicroelectronics

부품명 ST72561J4-Auto
상세설명  Clock, reset and supply management
PDF  324 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561J4-Auto 데이터시트(HTML) 232 Page - STMicroelectronics

Back Button ST72561J4-Auto Datasheet HTML 228Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 229Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 230Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 231Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 232Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 233Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 234Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 235Page - STMicroelectronics ST72561J4-Auto Datasheet HTML 236Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 232 / 324 page
background image
beCAN controller (beCAN)
ST72561-Auto
232/324
Doc ID 12370 Rev 8
17.5
Interrupts
Two interrupt vectors are dedicated to beCAN. Each interrupt source can be independently
enabled or disabled by means of the CAN Interrupt Enable Register (CIER) and CAN Error
Interrupt Enable register (CEIER).
Figure 108. Event flags and interrupt generation
●
The FIFO interrupt can be generated by the following events:
–
Reception of a new message, FMP bits in the CRFR0 register incremented.
–
FIFO0 full condition, FULL bit in the CRFR0 register set.
–
FIFO0 overrun condition, FOVR bit in the CRFR0 register set.
●
The transmit, error and status change interrupt can be generated by the following
events:
–
Transmit mailbox 0 becomes empty, RQCP0 bit in the CTSR register set.
–
Transmit mailbox 1 becomes empty, RQCP1 bit in the CTSR register set.
–
Error condition, for more details on error conditions please refer to the CAN Error
Status register (CESR).
–
Wake-up condition, SOF monitored on the CAN Rx signal.
17.6
Register access protection
Erroneous access to certain configuration registers can cause the hardware to temporarily
disturb the whole CAN network. Therefore the following registers can be modified by
software only while the hardware is in initialization mode:
CBTR0, CBTR1, CFCR0, CFCR1, CFMR and CDGR registers.
RQCP
RQCP
+
TMEIE
CIER
TRANSMIT/
&
EWGF
EWGIE
EPVF
EPVIE
BOFF
BOFIE
LECIEF
LECIE
&
&
&
&
+
&
ERRIE
FMP
&
FMPIE
FULL
&
FFIE
FOVR
&
FOVIE
+
FIFO
INTERRUPT
WKUI
&
WKUIE
TXMB 0
TXMB 1
+
INTERRUPT
ERROR/
STATUS CHANGE



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com