ST72561AR7-Auto datasheet(108/324 Pages) STMICROELECTRONICS

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16-bit timer

ST72561-Auto

108/324

Doc ID 12370 Rev 8

Figure 49.

Counter timing diagram, internal clock divided by 2

Figure 50.

Counter timing diagram, internal clock divided by 4

Figure 51.

Counter timing diagram, internal clock divided by 8

Note:

The MCU is in reset state when the internal reset signal is high, when it is low the MCU is

running.

12.3.3

Input capture

In this section, the index, i, may be 1 or 2 because there are two input capture functions in

the 16-bit timer.

The two 16-bit input capture registers (IC1R and IC2R) are used to latch the value of the

free running counter after a transition is detected on the ICAPi pin (see Figure 5).

ICiR register is a read-only register.

CPU CLOCK

FFFD FFFE FFFF 0000

0001

0002

0003

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER

TIMER OVERFLOW FLAG (TOF)

FFFC

FFFD

0000

0001

CPU CLOCK

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER

TIMER OVERFLOW FLAG (TOF)

CPU CLOCK

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER

TIMER OVERFLOW FLAG (TOF)

FFFC

FFFD

0000

MS Byte

LS Byte

ICiR

ICiHR

ICiLR

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