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ST72561AR7-Auto 데이터시트(PDF) 276 Page - STMicroelectronics |
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ST72561AR7-Auto 데이터시트(HTML) 276 Page - STMicroelectronics |
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276 / 324 page ![]() Electrical characteristics ST72561-Auto 276/324 Doc ID 12370 Rev 8 20.3.3 Auxiliary voltage detector (AVD) thresholds Subject to general operating conditions for TA. Figure 121. LVD startup behavior Note: When the LVD is enabled, the MCU reaches its authorized operating voltage from a reset state. However, in some devices, the reset signal may be undefined until VDD is approximately 2V. As a consequence, the I/Os may toggle when VDD is below this voltage. Because Flash write access is impossible below this voltage, the Flash memory contents will not be corrupted. 20.4 Supply current characteristics The following current consumption specified for the ST7 functional operating modes over temperature range does not take into account the clock source current consumption. To get the total device consumption, the two current values must be added (except for HALT mode for which the clock is stopped). Symbol Parameter Conditions Min Typ Max Unit VIT+(AVD) 1 ⇒0 AVDF flag toggle threshold (VDD rise) 4.4(1) 1. Data based on characterization results, not tested in production. 4.6 4.9 V VIT-(AVD) 0 ⇒1 AVDF flag toggle threshold (VDD fall) 4.2 4.4 4.65(1) Vhys(AVD) AVD voltage threshold hysteresis VIT+(AVD)-VIT-(AVD) 250 mV ΔVIT- Voltage drop between AVD flag set and LVD reset activated VIT-(AVD)-VIT-(LVD) 450 5V 2V VIT+ LVD RESET V D D t Reset state in this area not defined |
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