전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ST72561AR7-Auto 데이터시트(PDF) 290 Page - STMicroelectronics

부품명 ST72561AR7-Auto
상세설명  Clock, reset and supply management
PDF  324 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561AR7-Auto 데이터시트(HTML) 290 Page - STMicroelectronics

Back Button ST72561AR7-Auto Datasheet HTML 286Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 287Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 288Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 289Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 290Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 291Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 292Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 293Page - STMicroelectronics ST72561AR7-Auto Datasheet HTML 294Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 290 / 324 page
background image
Electrical characteristics
ST72561-Auto
290/324
Doc ID 12370 Rev 8
Figure 134. Typical VOH vs VDD
20.10
Control pin characteristics
20.10.1
Asynchronous RESET pin
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
34
56
Vdd(V)
2
3
4
5
6
-45°C
25°C
130°C
345
6
Vdd(V)
1
2
3
4
5
6
-45°C
25°C
130°C
Table 115.
RESET pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage(1)
0.3 x VDD
V
VIH
Input high level voltage(1)
0.7 x VDD
Vhys
Schmitt trigger voltage
hysteresis(2)
VDD =5V
1.5
VOL
Output low level voltage(3)
VDD =5V
IIO = +5mA
0.68
0.95
IIO = +2mA
0.28
0.45
RON
Weak pull-up equivalent
resistor(4)
VIN = VSS
20
40
80
k
Ω
tw(RSTL)out Generated reset pulse duration
Internal reset source
30
µs
th(RSTL)in
External reset pulse hold time(5)
2.5
tg(RSTL)in
Filtered glitch duration(6)
200
ns
1.
Data based on characterization results, not tested in production.
2.
Hysteresis voltage between Schmitt trigger switching levels.
3.
The IIO current sunk must always respect the absolute maximum rating specified in Section 20.2.2: Current characteristics
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
4.
To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on the
RESET pin with a duration below th(RSTL)in can be ignored.
5.
The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy
environments.
6.
Data guaranteed by design, not tested in production.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com