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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F769AI 데이터시트(PDF) 186 Page - STMicroelectronics |
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STM32F769AI 데이터시트(HTML) 186 Page - STMicroelectronics |
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186 / 255 page  Electrical characteristics STM32F765xx STM32F767xx STM32F768Ax STM32F769xx 186/255 DocID029041 Rev 4 JTAG/SWD timing diagrams Figure 51. JTAG timing diagram Table 88. Dynamics characteristics: SWD characteristics Symbol Parameter Conditions Min Typ Max Unit Fpp SWCLK clock frequency 2.7V <VDD< 3.6V - - 80 MHz 1/tc(SWCLK) 1.71 <VDD< 3.6V -- 50 tw(SWCLKH) SCK high and low time - TPCLK − 1TPCLK TPCLK + 1 ns tw(SWCLKL) tsu(SWDIO) SWDIO input setup time - 3.5 - - th(SWDIO) SWDIO input hold time - 0 - - tov (SWDIO) SWDIO output valid time 2.7V <VDD< 3.6V - 11 12 1.71 <VDD< 3.6V - 11 16.5 toh(SWDIO) SWDIO output hold time - 9 - - |
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