STM32F769AI datasheet(254/255 Pages) STMICROELECTRONICS

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Revision history

STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

254/255

DocID029041 Rev 4

Revision history

Table 138. Document revision history

Date

Revision

Changes

21-Mar-2016

Initial release.

26-Apr-2016

DFSDM replaced by DFSDM1 in:

– Table 10: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx pin and ball definitions.

– Table 12: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx alternate function mapping.

– Table 13: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx register boundary addresses.

– Section 5.3.34: Digital filter for Sigma-Delta Modulators (DFSDM)

characteristics.

Updated Table 2: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx features and peripheral counts adding DFSDM1

features.

Updated Table 39: Peripheral current consumption adding DFSDM1

current consumption.

Updated cover in 2 pages.

Update cover replacing for SPI ‘

up to 50 Mbit/s’ by ‘up to 54 Mbit/s’.

06-May-2016

Updated Table 2: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx features and peripheral counts GPIO number.

Updated Table 12: STM32F765xx, STM32F767xx, STM32F768Ax and

STM32F769xx alternate function mapping adding CAN3_RX alternate

function on PA8/AF11.

22-Dec-2016

Updated Table 97: Dynamics characteristics: Ethernet MAC signals for

RMII.

Updated Table 71: ADC characteristics sampling rate.

Updated all the notes removing ‘not tested in production’.

Updated Figure 46: SPI timing diagram - slave mode and CPHA = 0 and

Figure 47: SPI timing diagram - slave mode and CPHA = 1(1) with

modified NSS timing waveforms (among other changes).

Updated Table 121: LTDC characteristics clock output frequency at

65 MHz.

Updated Section 5.2: Absolute maximum ratings.

Updated Section 6: Package information adding information about other

optional marking or inset/upset marks.

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