Features
■ AEC-Q100 qualified
■ One main 32-bit Power Architecture® VLE Compliant CPU core, single issue – Single-precision floating point operations
■ 1568 KB on-chip RWW flash memory – Supporting EEPROM emulation (32 KB)
■ 64 KB general-purpose data SRAM
■ System Memory Protection Unit (SMPU)
■ Multi-channel direct memory access controllers (eDMA) with 16-channel for up to 60 DMA sources
■ Interrupt controller (INTC)
■ Four 32-bit and one 64-bit Periodic Interrupt Timer channels (PIT)
■ Single phase-locked loops with stable clock domain for peripherals and core (PLL)
■ System integration unit lite (SIUL2)
■ Boot assist flash (BAF) supports factory programming through UART/LIN, CAN
■ Generic timer module (GTM101) – Intelligent complex timer module – 72 channels (16 input and 56 output)
■ Enhanced analog-to-digital converter system with: – Three 12-bit SAR analog converters – One 16-bit Sigma-Delta analog converters
■ Decimation unit to support SD ADC data conditioning
■ Two deserial serial peripheral interface (DSPI) modules
■ Two LIN and UART communication interfaces (LINFlexD) modules
■ One μs-bus channel (composed by one DSPI and one LINFlexD)
■ Four SENT channels
■ Two modular controller area network (M_CAN) modules
■ Fast Ethernet controller (FEC)
■ Fast Asynchronous Serial Transmission (LFAST)
■ Nexus development interface (NDI) per IEEE- ISTO 5001-2003 standard, with some support for 2010 standard
■ Device and board test support per Joint Test Action Group (JTAG) (IEEE 1149.1 and IEEE 1149.7)
■ Single 5 V +/-10% Power supply supporting cold start conditions (down to 3.0 V)
■ Self Test capability
■ Designed for eTQFP80 and eTQFP100 eTQFP100 14 mm × 14 mm × 1.0 mm 0.5 mm pitch eTQFP80 10 mm × 10 mm × 1.0 mm 0.4 mm pitch