Description
The TC518129A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV
utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power
storage. The TC518129A-LV operates from a single power supply of 3.135V-5.5V. Refreshing is supported by a refresh (RFSH)
input which enables two types of refreshing - auto refresh and self refresh. The TC518129A-LV features a static RAM-like interface
with a write cycle in which the input data is written into the memory cell at the rising edge of R/W thus simplifying the microproces-
sor interface.
ACS standby mode interfacx: is incorporated in the TC518129A-LV family, with the CE2 pin in the TC518128A-LV family changed
to a CS pin. The TC518129A-LV s available in a 32-pin, 0.6 inch width plastic DIP, a small outline plastic flat package, and a 32-pin
thin small outline plastic package (forward type).

Features
• Organization:
131,072 words x 8 bits
• Low voltage operation:
3.135V-5.5V
• Data retention supply voltage: 3.0V ~ 5.5V
• Fast access time
ICEA CE Access Time
LOEA OE Access Time
IRC Cycle Time
Power Dissipation
Self Refresh Current
5.5V
3.0V
TC518129A-LV Family
-10
100ns
40ns
-80
80ns
35ns
130ns
385mW
- TC518129APL: DIP32-P-600
- TC518129AFL: SOP32-P-450
160ns
330mW
TC518129AFWL: SOP32-P-525
- TC518129AFTL: TSOP32-P-0820
200μA
100μA
• Auto refresh is supported by an internal refresh address counter
• Self refresh is supported by an internal timer
• Inputs and outputs TTL compatible
• Refresh: 512 refresh cycles/8ins
• Auto refresh power down feature
• Package
-12
120ns
50ns
190ns
275mW