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TC74VHCT9541AFK 데이터시트 (PDF) - Toshiba Semiconductor

TC74VHCT9541AFK Datasheet PDF - Toshiba Semiconductor
부품명 TC74VHCT9541AFK
다운로드  TC74VHCT9541AFK 다운로드
파일 크기   336.26 Kbytes
페이지   7 Pages
제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor
상세설명 Octal Universal Schmitt Buffer with 3-State Outputs

TC74VHCT9541AFK Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
TC74VHCT9541AFK Datasheet PDF - Toshiba Semiconductor

부품명 TC74VHCT9541AFK
다운로드  TC74VHCT9541AFK Click to download

파일 크기   336.26 Kbytes
페이지   7 Pages
제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor
상세설명 Octal Universal Schmitt Buffer with 3-State Outputs

TC74VHCT9541AFK 데이터시트 (HTML) - Toshiba Semiconductor


TC74VHCT9541AFK 제품 세부 정보

The TC74VHCT9541A is an ultra-high-speed octal Schmitt buffer fabricated
using silicon-gate CMOS technology. The TC74VHC9541A combines low
power consumption of CMOS with Schottky TTL speeds.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3 V to 5 V
system.
The outputs can be put in the high-impedance state by placing a logic HIGH
on the Enable (G ) input. The CONT input determines the logical inversion
of data. A logic LOW on the CONT input configures the TC74VHCT9541A
as an inverter; a logic HIGH on the CONT input configures the
TC74VHCT9541A as a buffer.
All the inputs have hysteresis between the positive-going and negativegoing thresholds. Thus the TC74VHCT9541A is capable of squaring up
transitions of slowly changing input signals and provides an improved noise immunity.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the
supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery
back up, etc.
Note: Output in off-state

Features
 High speed: tpd = 6.5ns (typ.) at VCC = 5 V
 Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
 Compatible with TTL inputs
VIL = 0.5 V (max)
VIH = 2.1 V (min)
 Power down protection is provided on all inputs.
 Balanced propagation delays: tpLH ∼− tpHL
 Input terminals are at the opposite side of Output terminals




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