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STW51000 데이터시트 (PDF) - STMicroelectronics

STW51000 Datasheet PDF - STMicroelectronics
부품명 STW51000
다운로드  STW51000 다운로드
파일 크기   220.92 Kbytes
페이지   8 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 SUPER INTEGRATED DSP ENGINE

STW51000 Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
STW51000 Datasheet PDF - STMicroelectronics

부품명 STW51000
다운로드  STW51000 Click to download

파일 크기   220.92 Kbytes
페이지   8 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 SUPER INTEGRATED DSP ENGINE

STW51000 데이터시트 (HTML) - STMicroelectronics


STW51000 제품 세부 정보

Overview/Description
GreenSIDE is a cost-effective, System-on-Chip device that targets applications in wireless infrastructure equipment. The device combines two quad-MAC ST140 DSP cores, a standard ARM926-EJS RISC processor core providing a total of 29000 Mops, 7500 Mips, 4800MMacs/s, 16Mb of embedded SRAM memory, dedicated Turbo Decoding Engine (TDE) for Data error correction, and Convolutional Decoding Engine (CDE) for Voice error correction for 2.5G and 3G standards, with a complete set of high-performance peripherals. As a highly-integrated baseband modem solution, GreenSIDE offers a unique opportunity to significantly reduce the overall cost/channel and cost/MIPS.

Product Features
■ Super Integrated SoC including 2 x ST140 quad MAC DSP engines running at 600MHz and 1 x ARM926 Micro Controller running at 300MHz
■ Double Quad-MAC units
■ Double Quad-ALU (32 and 40-bit)
■ 4800 MMacs/s - 29000 Mops - 7500 Mips
■ Convolutional Decoder Engine:
   – 256 x 12.2 kpbs AMR voice users
   – Programmable Code Parameters to support multi-standards (W-CDMA, TD-SCDMA, CDMA2000 and EDGE)
■ Turbo Decoder Engine:
   – 28 x 384 kbps (8 iterations)
   – Programmable Code Parameters to support multi-standards (W-CDMA, TD-SCDMA and CDMA2000)
   – Includes CRC Processing
   – Hardware Interleaver with multi-standard support
■ Two 32-channel DMA Engines
■ 16Mbit Central Memory shared among DSPs, µC and DMA Engines
■ One 32-bit External Memory Controller
■ One external Master Interface
■ One 32-bit Communication Interface
■ Two Multi-Channel Serial Ports
■ Two Ethernet MAC
■ One 16-bit UTOPIA Level 2 Interface
■ 32-bit General Purpose I/Os
■ Two 32-bit Timers
■ Programmable PLL Clock Generator
■ IEEE-1149.1 (JTAG)
■ Development tools available
■ Baseband modem SW deliverables available




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