FEATURES
• Twenty LVCMOS outputs, 7Ω typical output impedance
• LVCMOS / LVTTL clock input
• Maximum input frequency: 250MHz
• Bank enable logic allows unused banks to be disabled
in reduced fanout applications
• Bank skew: 200ps
• Output skew: 250ps
• Multiple frequency skew: 300ps
• Part-to-part skew: 600ps
• 3.3V or mixed 3.3V input, 2.5V output operating supply
• -40°C to 85°C ambient operating temperature
• Other divide values available on request
• Available in lead-free RoHS compliant package