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74AUP2G02 데이터시트 (PDF) - Nexperia B.V. All rights reserved

74AUP2G02 Datasheet PDF - Nexperia B.V. All rights reserved
부품명 74AUP2G02
다운로드  74AUP2G02 다운로드

파일 크기   269.23 Kbytes
페이지   17 Pages
제조업체  NEXPERIA [Nexperia B.V. All rights reserved]
홈페이지  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
상세설명 Low-power dual 2-input NOR gate

74AUP2G02 Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
74AUP2G02 Datasheet PDF - Nexperia B.V. All rights reserved

부품명 74AUP2G02
다운로드  74AUP2G02 Click to download

파일 크기   269.23 Kbytes
페이지   17 Pages
제조업체  NEXPERIA [Nexperia B.V. All rights reserved]
홈페이지  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
상세설명 Low-power dual 2-input NOR gate

74AUP2G02 데이터시트 (HTML) - Nexperia B.V. All rights reserved

Back Button 74AUP2G02 Datasheet HTML 1Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 2Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 3Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 4Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 5Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 6Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 7Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 8Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 9Page - Nexperia B.V. All rights reserved 74AUP2G02 Datasheet HTML 10Page - Nexperia B.V. All rights reserved Next Button 

74AUP2G02 제품 세부 정보

1. General description
The 74AUP2G02 is a dual 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit
tolerant of slower input rise and fall times. This device ensures very low static and dynamic power
consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for
partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the
potentially damaging backflow current through the device when it is powered down.
2. Features and benefits
• Wide supply voltage range from 0.8 V to 3.6 V
• High noise immunity
• Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.9 V to 1.65 V)
• JESD8-7 (1.2 V to 1.95 V)
• JESD8-5 (1.8 V to 2.7 V)
• JESD8-B (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Low static power consumption; ICC = 0.9 μA (maximum)
• Latch-up performance exceeds 100 mA per JESD78B Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial power-down mode operation
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C




유사한 부품 번호 - 74AUP2G02

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유사한 설명 - 74AUP2G02

제조업체부품명데이터시트상세설명
logo
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74AUP2G02 NXP-74AUP2G02 Datasheet
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   Low-power dual 2-input NOR gate
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logo
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[Old version datasheet]   LOW-POWER DUAL 2-INPUT POSITIVE-NOR GATE
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ON Semiconductor
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