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ADS6445 데이터시트 (PDF) - STMicroelectronics

ADS6445 Datasheet PDF - STMicroelectronics
부품명 ADS6445
다운로드  ADS6445 다운로드
파일 크기   2838.08 Kbytes
페이지   75 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS

ADS6445 Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
ADS6445 Datasheet PDF - STMicroelectronics

부품명 ADS6445
다운로드  ADS6445 Click to download

파일 크기   2838.08 Kbytes
페이지   75 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS

ADS6445 데이터시트 (HTML) - STMicroelectronics


ADS6445 제품 세부 정보

DESCRIPTION
The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB.
The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies.
An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.
The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver.
The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary.

FEATURES
• Maximum Sample Rate: 125 MSPS
• 14-Bit Resolution with No Missing Codes
• Simultaneous Sample and Hold
• 3.5dB Coarse Gain and up to 6dB
   Programmable Fine Gain for SFDR/SNR
   Trade-Off
• Serialized LVDS Outputs with Programmable
   Internal Termination Option
• Supports Sine, LVCMOS, LVPECL, LVDS
   Clock Inputs and Amplitude down to 400 mVPP
• Internal Reference with External Reference
   Support
• No External Decoupling Required for
   References
• 3.3-V Analog and Digital Supply
• 64 QFN Package (9 mm × 9 mm)
• Pin Compatible 12-Bit Family (ADS642X -
   SLAS532)
• Feature Compatible Dual Channel Family
   (ADS624X - SLAS542, ADS644X - SLAS543)

APPLICATIONS
• Base-Station IF Receivers
• Diversity Receivers
• Medical Imaging
• Test Equipment




유사한 부품 번호 - ADS6445

제조업체부품명데이터시트상세설명
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Texas Instruments
ADS6445 TI-ADS6445 Datasheet
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QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS
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유사한 설명 - ADS6445

제조업체부품명데이터시트상세설명
logo
Texas Instruments
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*이 정보는 일반적인 정보 제공의 목적으로만 제공되며 위 정보로 인해 발생하는 손실이나 손해에 대해 책임을 지지 않습니다.




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